В этой статье приведено описание значений пост кодов AMI BIOS на английском языке из англоязычных источников. Все описания приведены в оригинальном виде.
Об использовании POST кодов для диагностики можно узнать в статье «POST коды».
POST коды AMI BIOS (AMIBIOS8)
| 00 | Passes control to OS Loader (typically INT19h). |
| 03 | Disable NMI, Parity, video for EGA, and DMA controllers. Initialize BIOS, POST, Runtime data area. Also initialize BIOS modules on POST entry and GPNV area. |
| 04 | Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK. Verify CMOS checksum manually by reading storage area. |
| 05 | Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table. |
| 06 | Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt. |
| 08 | Initializes the CPU. The BAT test is being done on KBC. Program the keyboard controller command byte is being done after Auto detection of KB/MS using AMI KB-5. |
| 0A | Initializes the 8042 compatible Key Board Controller. |
| 0B | Detects the presence of PS/2 mouse. |
| 0C | Detects the presence of Keyboard in KBC port. |
| 0E | Testing and initialization of different Input Devices. Also, update the Kernel Variables. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. |
| 13 | Early POST initialization of chipset registers. |
| 24 | Uncompress and initialize any platform specific BIOS modules. |
| 30 | Initialize System Management Interrupt. |
| 2A | Initializes different devices through DIM. See DIM Code Checkpoints section of document for more information. |
| 2C | Initializes different devices. Detects and initializes the video adapter installed in the system that have optional ROMs. |
| 2E | Initializes all the output devices. |
| 31 | Allocate memory for ADM module and uncompress it. Give control to ADM module for initialization. Initialize language and font modules for ADM. Activate ADM module. |
| 33 | Initializes the silent boot module. Set the window for displaying text information. |
| 37 | Displaying sign-on message, CPU information, setup key message, and any OEM specific information. |
| 38 | Initializes different devices through DIM. See DIM Code Checkpoints section of document for more information. |
| 39 | Initializes DMAC-1 & DMAC-2. |
| 3A | Initialize RTC date/time. |
| 3B | Test for total memory installed in the system. Also, Check for DEL or ESC keys to limit memory test. Display total memory in the system. |
| 3C | Mid POST initialization of chipset registers. |
| 40 | Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, … etc.) successfully installed in the system and update the BDA, EBDA…etc. |
| 50 | Programming the memory hole or any kind of implementation that needs an adjustment in system RAM size if needed. |
| 52 | Updates CMOS memory size from memory found in memory test. Allocates memory for Extended BIOS Data Area from base memory. |
| 60 | Initializes NUM-LOCK status and programs the KBD typematic rate. |
| 75 | Initialize Int-13 and prepare for IPL detection. |
| 78 | Initializes IPL devices controlled by BIOS and option ROMs. |
| 7A | Initializes remaining option ROMs. |
| 7C | Generate and write contents of ESCD in NVRam. |
| 84 | Log errors encountered during POST. |
| 85 | Display errors to the user and gets the user response for error. |
| 87 | Execute BIOS setup if needed / requested. |
| 8C | Late POST initialization of chipset registers. |
| 8D | Build ACPI tables (if ACPI is supported). |
| 8E | Program the peripheral parameters. Enable/Disable NMI as selected. |
| 90 | Late POST initialization of system management interrupt. |
| A0 | Check boot password if installed. |
| A1 | Clean-up work needed before booting to OS. |
| A2 | Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. |
| A4 | Initialize runtime language module. |
| A7 | Displays the system configuration screen if enabled. Initialize the CPU’s before boot, which includes the programming of the MTRR’s. |
| A8 | Prepare CPU for OS boot including final MTRR values. |
| A9 | Wait for user input at config display if needed. |
| AA | Uninstall POST INT1Ch vector and INT09h vector. Deinitializes the ADM module. |
| AB | Prepare BBS for Int 19 boot. |
| AC | End of POST initialization of chipset registers. |
| B1 | Save system context for ACPI. |
| C0 | Early CPU Init Start — Disable Cache — Init Local APIC. |
| C1 | Set up boot strap proccessor Information. |
| C2 | Set up boot strap proccessor for POST. |
| C5 | Enumerate and set up application proccessors. |
| C6 | Re-enable cache for boot strap proccessor. |
| C7 | Early CPU Init Exit. |
| D0 | Go to flat mode with 4GB limit and GA20 enabled. Verify the bootblock checksum. |
| D1 | Perform keyboard controller BAT test. Check if waking up from power management suspend state. Save power-on CPUID value in scratch CMOS. |
| D2 | Disable CACHE before memory detection. Execute full memory sizing module. Verify that flat mode is enabled. |
| D3 | If memory sizing module not executed, start memory refresh and do memory sizing in Bootblock code. Do additional chipset initialization. |
| D4 | Test base 512KB memory. Adjust policies and cache first 8MB. Set stack. |
| D5 | Bootblock code is copied from ROM to lower system memory and control is given to it. BIOS now executes out of RAM. |
| D6 | Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced. Main BIOS checksum is tested. |
| D7 | Restore CPUID value back into register. The Bootblock-Runtime interface module is moved to system memory and control is given to it. |
| D8 | The Runtime module is uncompressed into memory. CPUID information is stored in memory. |
| D9 | Store the Uncompressed pointer for future use in PMM. Copying Main BIOS into memory. Leaves all RAM below 1MB Read-Write. |
| DA | Restore CPUID value back into register. Give control to BIOS POST (ExecutePOSTKernel). See POST Code Checkpoints section of document for more information. |
| E0 | Initialize the floppy controller in the super I/O. Some interrupt vectors are initialized. DMA controller is initialized. |
| E9 | Set up floppy controller and data. Attempt to read from floppy. |
| EA | Enable ATAPI hardware. Attempt to read from ARMD and ATAPI CDROM. Determine information about root directory of recovery media. |
| EB | Disable ATAPI hardware. Jump back to checkpoint E9. |
| EF | Read error occurred on media. Jump back to checkpoint EB. |
| F0 | Search for pre-defined recovery file name in root directory. |
| F1 | Recovery file not found. |
| F2 | Start reading FAT table and analyze FAT to find the clusters occupied by the recovery file. |
| F3 | Start reading the recovery file cluster by cluster. |
| F5 | Disable L1 cache. |
| FA | Check the validity of the recovery file configuration to the current configuration of the flash part. |
| FB | Make flash write enabled through chipset and OEM specific method. Detect proper flash part. Verify that the found flash part size equals the recovery file size. |
| F4 | The recovery file size does not equal the found flash part size. |
| FC | Erase the flash part. FD Program the flash part. |
| FF | The flash has been updated successfully. Make flash write disabled. Disable ATAPI hardware. Restore CPUID value back into register. Give control to F000 ROM at F000:FFF0h. |
| 00 | Passes control to OS Loader (typically INT19h). |